Altera cyclone V Technical Reference page 2136

Hard processor system

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The application reads this register whenever there is an OTG interrupt and clears the bits in this register to

clear the OTG interrupt.

Module Instance

Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by

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This bit is set when a session request initiation is

successful. This bit is valid only For Device Only

configuration when OTG_MODE == 3 or OTG_

MODE == 4. Applies for device only.

software or hardware. Any area of the memory map that is not explicitly defined as a register

space or accessible memory is considered reserved.

Session request failure

Session request success

Base Address

USB 2.0 OTG Controller

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