Altera cyclone V Technical Reference page 2177

cv_5v4
2016.10.28
ghwcfg1
This register contains the logical endpoint direction(s).
Module Instance
usb0
usb1
Offset:
0x44
Access:
RO
31 30
15 14
ghwcfg1 Fields
Bit
31:0
ghwcfg1
ghwcfg2
This register contains configuration options.
Module Instance
usb0
usb1
USB 2.0 OTG Controller
Send Feedback
0xFFB00000
0xFFB40000
29 28 27 26
13 12 11 10
Name
This 32-bit field uses two bits per endpoint to
determine the endpoint direction. Endpoint -Bits
[31:30]: Endpoint 15 direction -Bits [29:28]: Endpoint
14 direction ... -Bits [3:2]: Endpoint 1 direction -
Bits[1:0]: Endpoint 0 direction (always BIDIR)
Value
0x0
0x1
0x2
0x3
0xFFB00000
0xFFB40000
Base Address
Bit Fields
25 24 23 22
ghwcfg1
RO 0x0
9 8 7 6
ghwcfg1
RO 0x0
Description
Description
BIDIR (IN and OUT) endpoint
IN endpoint
OUT endpoint
Reserved
Base Address
ghwcfg1
Register Address
0xFFB00044
0xFFB40044
21 20 19 18
5 4 3 2
Access
Register Address
0xFFB00048
0xFFB40048
18-87
17 16
1 0
Reset
RO 0x0
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