Altera cyclone V Technical Reference page 2539

Hard processor system
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cv_5v4
2016.10.28
31
30
15
14
diepdma2 Fields
Bit
31:0
diepdma2
DTXFSTS2
This register contains the free space information for the Device IN endpoint TxFIFO.
Module Instance
usb0
usb1
Offset:
0x958
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
USB 2.0 OTG Controller
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29
28
27
26
13
12
11
10
Name
Holds the start address of the external memory for
storing or fetching endpoint data. for control
endpoints, this field stores control OUT data packets
as well as SETUP transaction data packets. When
more than three SETUP packets are received back-to-
back, the SETUP data packet in the memory is
overwritten. This register is incremented on every
AHB transaction. The application can give only a
DWORD-aligned address. When Scatter/Gather
DMA mode is not enabled, the application programs
the start address value in this field. When Scatter/
Gather DMA mode is enabled, this field indicates the
base pointer for the descriptor list.
0xFFB00000
0xFFB40000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25
24
23
22
diepdma2
RW 0x0
9
8
7
6
diepdma2
RW 0x0
Description
Base Address
DTXFSTS2
21
20
19
18
5
4
3
2
Access
Register Address
0xFFB00958
0xFFB40958
18-449
17
16
1
0
Reset
RW
0x0
Altera Corporation

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