Altera cyclone V Technical Reference page 2464

Hard processor system
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18-374
Device Mode Registers Register Descriptions
doeptsiz7
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint-n Control registers (DIEPCTLn.EPEna/
DOEPCTLn.EPEna), the core modifies this register. The application can only read this register once the
core has cleared the Endpoint Enable bit.
doepdma7
DMA OUT Address.
doepdmab7
DMA Buffer Address.
doepctl8
on page 18-733
Out Endpoint 8.
doepint8
on page 18-739
This register indicates the status of an endpoint with respect to USB- and AHB-related events. The
application must read this register when the OUT Endpoints Interrupt bit or IN Endpoints Interrupt bit of
the Core Interrupt register (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the
application can read this register, it must first read the Device All Endpoints Interrupt (DAINT) register to
get the exact endpoint number for the Device Endpoint-n Interrupt register. The application must clear the
appropriate bit in this register to clear the corresponding bits in the DAINT and GINTSTS registers.
doeptsiz8
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint-n Control registers (DIEPCTLn.EPEna/
DOEPCTLn.EPEna), the core modifies this register. The application can only read this register once the
core has cleared the Endpoint Enable bit.
doepdma8
DMA OUT Address.
doepdmab8
DMA Buffer Address.
doepctl9
on page 18-746
Out Endpoint 9.
doepint9
on page 18-752
This register indicates the status of an endpoint with respect to USB- and AHB-related events. The
application must read this register when the OUT Endpoints Interrupt bit or IN Endpoints Interrupt bit of
the Core Interrupt register (GINTSTS.OEPInt or GINTSTS.IEPInt, respectively) is set. Before the
application can read this register, it must first read the Device All Endpoints Interrupt (DAINT) register to
get the exact endpoint number for the Device Endpoint-n Interrupt register. The application must clear the
appropriate bit in this register to clear the corresponding bits in the DAINT and GINTSTS registers.
doeptsiz9
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint-n Control registers (DIEPCTLn.EPEna/
DOEPCTLn.EPEna), the core modifies this register. The application can only read this register once the
core has cleared the Endpoint Enable bit.
doepdma9
DMA OUT Address.
Altera Corporation
on page 18-730
on page 18-732
on page 18-732
on page 18-743
on page 18-745
on page 18-745
on page 18-756
on page 18-758
cv_5v4
2016.10.28
USB 2.0 OTG Controller
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