Altera cyclone V Technical Reference page 2382

18-292
hcchar11
Offset:
0x660
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
chena chdis Reser
RO 0x0 RO
0x0
15 14
epdir
RW 0x0
hcchar11 Fields
Bit
31
chena
30
chdis
28:22
devaddr
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software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
ved
13 12 11 10
epnum
RW 0x0
Name
When Scatter/Gather mode is disabled This field is set
by the application and cleared by the OTG host. 0:
Channel disabled 1: Channel enabled When Scatter/
Gather mode is enabled.
Value
0x0
0x1
The application sets this bit to stop transmitting/
receiving data on a channel, even before the transfer
for that channel is complete. The application must
wait for the Channel Disabled interrupt before
treating the channel as disabled.
Value
0x0
0x1
This field selects the specific device serving as the data
source or sink.
Bit Fields
25 24 23 22
devaddr
RW 0x0
9 8 7 6
Description
Description
Indicates that the descriptor structure is not
yet ready
Indicates that the descriptor structure and
data buffer with data is setup and this channel
can access the descriptor
Description
Transmit/Recieve normal
Stop transmitting/receiving
21 20 19 18
ec eptype
RW 0x0 RW 0x0
5 4 3 2
mps
RW 0x0
Access
USB 2.0 OTG Controller
cv_5v4
2016.10.28
17 16
lspdd Reserved
ev
RW
0x0
1 0
Reset
RO 0x0
RO 0x0
RW 0x0
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