Altera cyclone V Technical Reference page 2497

Hard processor system
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cv_5v4
2016.10.28
Bit
12:11
ahbthrratio
10:2
txthrlen
1
isothren
USB 2.0 OTG Controller
Send Feedback
Name
These bits define the ratio between the AHB threshold
and the MAC threshold for the transmit path only.
The AHB threshold always remains less than or equal
to the USB threshold, because this does not increase
overhead. Both the AHB and the MAC threshold
must be DWORD-aligned. The application needs to
program TxThrLen and the AHBThrRatio to make
the AHB Threshold value DWORD aligned. If the
AHB threshold value is not DWORD aligned, the core
might not behave correctly. When programming the
TxThrLen and AHBThrRatio, the application must
ensure that the minimum AHB threshold value does
not go below 8 DWORDS to meet the USB
turnaround time requirements.
Value
0x0
0x1
0x2
0x3
This field specifies Transmit thresholding size in
DWORDS. This also forms the MAC threshold and
specifies the amount of data in bytes to be in the
corresponding endpoint transmit FIFO, before the
core can start transmit on the USB. The threshold
length has to be at least eight DWORDS when the
value of AHBThrRatio is 0. In case the AHBThrRatio
is non zero the application needs to ensure that the
AHB Threshold value does not go below the
recommended eight DWORD. This field controls both
isochronous and non-isochronous IN endpoint
thresholds. The recommended value for ThrLen is to
be the same as the programmed AHB Burst Length
(GAHBCFG.HBstLen).
When this bit is Set, the core enables thresholding for
isochronous IN endpoints.
Value
0x0
0x1
Description
Description
AHB threshold = MAC threshold
AHB threshold = MAC threshold /2
AHB threshold = MAC threshold /4
AHB threshold = MAC threshold /
Description
No thresholding
Enables thresholding
18-407
dthrctl
Access
Reset
RW
0x0
RW
0x8
RW
0x0
Altera Corporation

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