Altera cyclone V Technical Reference page 2515

Hard processor system
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cv_5v4
2016.10.28
Bit
29
setd1pid
28
setd0pid
27
snak
USB 2.0 OTG Controller
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Name
Applies to interrupt/bulk IN and OUT endpoints
only. Writing to this field sets the Endpoint Data PID
(DPID)​ field in this register to DATA1. This field is
applicable both for Scatter/Gather DMA mode and
non-Scatter/Gather DMA mode. Set Odd (micro)
frame (SetOddFr) Applies to isochronous IN and
OUT endpoints only. Writing to this field sets the
Even/Odd (micro)frame (EO_FrNum) field to odd
(micro)​frame.This field is not applicable for Scatter/
Gather DMA mode.
Value
0x0
0x1
Applies to interrupt/bulk IN and OUT endpoints
only. Writing to this field sets the Endpoint Data PID
(DPID)​ field in this register to DATA0. This field is
applicable both for Scatter/Gather DMA mode and
non-Scatter/Gather DMA mode. In non-Scatter/
Gather DMA mode: Set Even (micro)frame
(SetEvenFr) Applies to isochronous IN and OUT
endpoints only. Writing to this field sets the Even/
Odd (micro)frame (EO_FrNum) field to even (micro)
frame. When Scatter/Gather DMA mode is enabled,
this field is reserved. The frame number in which to
send data is in the transmit descriptor structure. The
frame in which to receive data is updated in receive
descriptor structure.
Value
0x0
0x1
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application can control the
transmission of NAK handshakes on an endpoint.
The core can also Set this bit for an endpoint after a
SETUP packet is received on that endpoint.
Value
0x0
0x1
Description
Description
Disables Set DATA1 PID
Enables Set DATA1 PID
Description
Disables Set DATA0 PID
Endpoint Data PID to DATA0)
Description
No Set NAK
Set NAK
18-425
diepctl1
Access
Reset
WO
0x0
WO
0x0
WO
0x0
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