Altera cyclone V Technical Reference page 2178

Hard processor system
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18-88
ghwcfg2
Offset:
0x48
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
Reserved
15
14
numhstchnl
RO 0xF
ghwcfg2 Fields
Bit
30:26
tknqdepth
25:24
ptxqdepth
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
tknqdepth
RO 0x8
13
12
11
10
numdeveps
RO 0xF
Name
Range: 0 to 30.
Specifies the Host mode Periodic Request Queue
depth.That is, the maximum number of packets that
can reside in the Host Periodic TxFIFO. This queue
holds one entry corresponding to each IN or OUT
periodic request. This queue is 9 bits wide.
0x0
0x1
0x2
0x3
Bit Fields
25
24
23
22
ptxqdepth
nptxqdepth
RO 0x0
RO 0x2
9
8
7
6
fsphytype
hsphytype
RO 0x0
RO 0x2
Description
Value
Description
Que Depth 2
Que Depth 4
Que Depth 8
Que Depth 16
21
20
19
18
Reser
multi
dynfi
perio
ved
proci
fosiz
suppo
ntrpt
ing
rt
RO
RO
RO
0x0
0x1
0x1
5
4
3
2
singp
otgarch
nt
RO 0x2
RO
0x0
USB 2.0 OTG Controller
cv_5v4
2016.10.28
17
16
numhstchnl
RO 0xF
1
0
otgmode
RO 0x0
Access
Reset
RO
0x8
RO
0x0
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