Altera cyclone V Technical Reference page 2503

Hard processor system
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cv_5v4
2016.10.28
Bit
27
snak
26
cnak
25:22
txfnum
21
stall
19:18
eptype
USB 2.0 OTG Controller
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Name
A write to this bit sets the NAK bit for the endpoint.
Using this bit, the application can control the
transmission of NAK handshakes on an endpoint.
The core can also Set this bit for an endpoint after a
SETUP packet is received on that endpoint.
Value
0x0
0x1
A write to this bit clears the NAK bit for the endpoint.
Value
0x0
0x1
for Shared FIFO operation, this value is always Set to
0, indicating that control IN endpoint 0 data is always
written in the Non-Periodic Transmit FIFO. for
Dedicated FIFO operation, this value is Set to the
FIFO number that is assigned to IN Endpoint 0.
The application can only Set this bit, and the core
clears it, when a SETUP token is received for this
endpoint. If a NAK bit, Global Nonperiodic IN NAK,
or Global OUT NAK is Set along with this bit, the
STALL bit takes priority.
Value
0x0
0x1
Hardcoded to 00 for control.
Value
0x0
Description
Description
No action
Set NAK
Description
No action
Clear NAK
Description
No Stall
Stall Handshake
Description
Endpoint Control 0
18-413
diepctl0
Access
Reset
WO
0x0
WO
0x0
RW
0x0
RO
0x0
RO
0x0
Altera Corporation

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