Altera cyclone V Technical Reference page 2475

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
Bit
2
gnpinnaksts
1
sftdiscon
USB 2.0 OTG Controller
Send Feedback
Name
Defines IN NAK conditions.
Value
0x0
0x1
The application uses this bit to signal the otg core to
do a soft disconnect. As long as this bit is Set, the host
does not see that the device is connected, and the
device does not receive signals on the USB. The core
stays in the disconnected state until the application
clears this bit. There is a minimum duration for which
the core must keep this bit set. When this bit is
cleared after a soft disconnect, the core drives the
phy_opmode_o signal on the ULPI, which generates a
device connect event to the USB host. When the
device is reconnected, the USB host restarts device
enumeration.;
Value
0x0
0x1
Description
Description
A handshake is sent out based on the data
availability in the transmit FIFO
A NAK handshake is sent out on all non-
periodic IN endpoints, irrespective of the
data availability in the transmit FIFO.
Description
Normal operation
The core drives the phy_opmode_o signal on
the ULPI
18-385
dctl
Access
Reset
RO
0x0
RW
0x0
Altera Corporation

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents