Altera cyclone V Technical Reference page 2119

Hard processor system
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cv_5v4
2016.10.28
Register
diepctl9
on page 18-
535
diepint9
on page 18-
541
dieptsiz9
on page 18-
545
diepdma9
on page 18-
546
dtxfsts9
on page 18-
547
diepdmab9
on page 18-
548
diepctl10
on page 18-
549
diepint10
on page 18-
555
dieptsiz10
on page
18-559
diepdma10
on page 18-
560
dtxfsts10
on page 18-
561
diepdmab10
on page
18-562
diepctl11
on page 18-
563
diepint11
on page 18-
569
dieptsiz11
on page
18-573
diepdma11
on page 18-
574
dtxfsts11
on page 18-
575
diepdmab11
on page
18-576
diepctl12
on page 18-
577
diepint12
on page 18-
583
USB 2.0 OTG Controller
Send Feedback
USB OTG Controller Module Registers Address Map
Offset
Width Acces
s
0xA20
32
RW
0xA28
32
RO
0xA30
32
RW
0xA34
32
RW
0xA38
32
RO
0xA3C
32
RO
0xA40
32
RW
0xA48
32
RO
0xA50
32
RW
0xA54
32
RW
0xA58
32
RO
0xA5C
32
RO
0xA60
32
RW
0xA68
32
RO
0xA70
32
RW
0xA74
32
RW
0xA78
32
RO
0xA7C
32
RO
0xA80
32
RW
0xA88
32
RO
Reset Value
Device Control IN Endpoint 9
0x0
Control Register
Device IN Endpoint 9 Interrupt
0x80
Register
Device IN Endpoint 9 Transfer
0x0
Size Register
Device IN Endpoint 9 DMA
0x0
Address Register
Device IN Endpoint Transmit
0x2000
FIFO Status Register 9
Device IN Endpoint 9 DMA
0x0
Buffer Address Register
Device Control IN Endpoint 10
0x0
Control Register
Device IN Endpoint 10 Interrupt
0x80
Register
Device IN Endpoint 10 Transfer
0x0
Size Register
Device IN Endpoint 10 DMA
0x0
Address Register
Device IN Endpoint Transmit
0x2000
FIFO Status Register 10
Device IN Endpoint 10 DMA
0x0
Buffer Address Register
Device Control IN Endpoint 11
0x0
Control Register
Device IN Endpoint 11 Interrupt
0x80
Register
Device IN Endpoint 11 Transfer
0x0
Size Register
Device IN Endpoint 11 DMA
0x0
Address Register
Device IN Endpoint Transmit
0x2000
FIFO Status Register 11
Device IN Endpoint 11 DMA
0x0
Buffer Address Register
Device Control IN Endpoint 12
0x0
Control Register
Device IN Endpoint 12 Interrupt
0x80
Register
18-29
Description
Altera Corporation

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