Altera cyclone V Technical Reference page 2159

Hard processor system

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USB 2.0 OTG Controller

Send Feedback

Mode: Device only. The core sets this bit to indicate

that a suspend was detected on the USB. The core

enters the Suspended state when there is no activity

on the phy_line_state_i signal for an extended period

Mode: Device only. The core sets this bit to indicate

that an Idle state has been detected on the USB for 3

Mode: Device only. Indicates that the Set Global OUT

NAK bit in the Device Control register

(DCTL.SGOUTNak), Set by the application, has

taken effect in the core. This bit can be cleared by

writing the Clear Global OUT NAK bit in the Device

Control register (DCTL.CGOUTNak).

Mode: Device only. Indicates that the Set Global Non-

periodic IN NAK bit in the Device Control register

(DCTL.SGNPInNak), Set by the application, has

taken effect in the core. That is, the core has sampled

the Global IN NAK bit Set by the application. This bit

can be cleared by clearing the Clear Global Non-

periodic IN NAK bit in the Device Control register

(DCTL.CGNPInNak). This interrupt does not

necessarily mean that a NAK handshake is sent out

on the USB. The STALL bit takes precedence over the

Idle state detecetd

Global OUT NAK Effective

Set Global Non-periodic IN NAK bi

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