Altera cyclone V Technical Reference page 2135

cv_5v4
2016.10.28
Bit
3
vbvalidovval
2
vbvalidoven
1
sesreq
USB 2.0 OTG Controller
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Name
This bit is used to set Override value for vbus valid
signal when GOTGCTL.VbvalidOvEn is set.
Value
0x0
0x1
This bit is used to enable/disable the software to
override the vbus-valid signal using the
GOTGCTL.vbvalidOvVal..
Value
0x0
0x1
The application sets this bit to initiate a session
request on the USB. The application can clear this bit
by writing a 0 when the Host Negotiation Success
Status Change bit in the OTG Interrupt register
(GOTGINT.HstNegSucStsChng) is SET. The core
clears this bit when the HstNegSucStsChng bit is
cleared. If you use the USB 1.1 Full-Speed Serial
Transceiver interface to initiate the session request,
the application must wait until the VBUS discharges
to 0.2 V, after the B-Session Valid bit in this register
(GOTGCTL.BSesVld) is cleared. This discharge time
varies between different PHYs and can be obtained
from the PHY vendor.
Value
0x0
0x1
Description
Description
vbusvalid value when
GOTGCTL.VbvalidOvEn = 1
vbusvalid value when
GOTGCTL.VbvalidOvEn is 1
Description
Override is disabled and bvalid signal from
the respective PHY selected is used internally
by the force
The vbus-valid signal received from the PHY
is overridden with GOTGCTL.vbvalidOvVal
Description
No session request
Session request
18-45
gotgctl
Access Reset
RW 0x0
RW 0x0
RW 0x0
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