Altera cyclone V Technical Reference page 2517

Hard processor system

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USB 2.0 OTG Controller

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This is the transfer type supported by this logical

When either the application or the core sets this bit:

-The core stops receiving any data on an OUT

endpoint, even if there is space in the RxFIFO to

accommodate the incoming packet. -for non-isochro‐

nous IN endpoints: The core stops transmitting any

data on an IN endpoint, even if there data is available

in the TxFIFO. -for isochronous IN endpoints: The

core sends out a zero-length data packet, even if there

data is available in the TxFIFO. Irrespective of this

bit's setting, the core always responds to SETUP data

packets with an ACK handshake.

The core is transmitting non-NAK

handshakes based on the FIFO status

The core is transmitting NAK handshakes on

this endpoint

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