Renesas H8S/2319 series Hardware Manual page 446

TCNT count
H'FF
H'00
WT/IT=1
TME=1
*3
WDTOVF signal
*1
Internal reset signal
Legend:
WT/IT : Timer mode select bit
: Timer enable bit
TME
Notes: 1. The internal reset signal is generated only if the RSTE bit is set to 1.
2. 130 states when the RSTE bit is cleared to 0.
3. The WDTOVF output function is not available in the F-ZTAT versions.
Rev. 5.00, 12/03, page 416 of 1088
H'00 written
to TCNT
Figure 11-4 Operation in Watchdog Timer Mode
Overflow
WOVF=1 WT/IT=1
TME=1
*3
WDTOVF
and
internal reset are
generated
*2
132 states
518 states
Time
H'00 written
to TCNT