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7.3.6
Repeat Mode
In repeat mode, one operation transfers one byte or one word of data.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Table 7-7 lists the register information in repeat mode and figure 7-7 shows the memory map in
repeat mode.
Table 7-7
Register Information in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
SAR or
DAR
Rev. 5.00, 12/03, page 202 of 1088
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Repeat area
Transfer
Figure 7-7 Memory Map in Repeat Mode
Function
Designates source address
Designates destination address
Holds number of transfers
Transfer counter
Not used
DAR or
SAR
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