17.22.2 Overview - Renesas H8S/2319 series Hardware Manual

Renesas 16-bit single-chip microcomputer
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17.22.2 Overview

(1) Block Diagram
Mode pin
Legend:
FCCS:
Flash code control and status register
FPCS:
Flash program code select register
FECS:
Flash erase code select register
FKEY:
Flash key code register
FMATS: Flash MAT select register
FTDAR: Flash transfer destination address register
RAMER: RAM emulation register
Note: To read from or write to any of the registers above except RAMER, the FLSHE bit
in system control register 2 (SYSCR2) must be set to 1.
Rev. 5.00, 12/03, page 666 of 1088
Internal address bus
Internal data bus (16 bits)
FCCS
FPCS
FECS
FKEY
Control unit
FMATS
FTDAR
RAMER
Operating
mode
Figure 17-60 Block Diagram of Flash Memory
User MAT: 512 kbytes
User boot MAT: 8 kbytes
Flash memory
Memory MAT unit

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