Table of Contents
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13.2 Register Descriptions ........................................................................................................ 491
13.2.1 Smart Card Mode Register (SCMR) .................................................................... 491
13.2.2 Serial Status Register (SSR) ................................................................................ 492
13.2.3 Serial Mode Register (SMR)................................................................................ 493
13.2.4 Serial Control Register (SCR).............................................................................. 495
13.3 Operation .......................................................................................................................... 496
13.3.1 Overview.............................................................................................................. 496
13.3.2 Pin Connections ................................................................................................... 496
13.3.3 Data Format ......................................................................................................... 498
13.3.4 Register Settings .................................................................................................. 500
13.3.5 Clock.................................................................................................................... 502
13.3.6 Data Transfer Operations ..................................................................................... 504
13.3.7 Operation in GSM Mode ..................................................................................... 511
13.3.8 Operation in Block Transfer Mode ...................................................................... 512
13.4 Usage Notes ...................................................................................................................... 513
14.1 Overview........................................................................................................................... 517
14.1.1 Features................................................................................................................ 517
14.1.2 Block Diagram..................................................................................................... 518
14.1.3 Pin Configuration................................................................................................. 519
14.1.4 Register Configuration......................................................................................... 520
14.2 Register Descriptions ........................................................................................................ 521
14.2.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 521
14.2.2 A/D Control/Status Register (ADCSR) ............................................................... 522
14.2.3 A/D Control Register (ADCR) ............................................................................ 524
14.2.4 Module Stop Control Register (MSTPCR) .......................................................... 525
14.3 Interface to Bus Master ..................................................................................................... 526
14.4 Operation .......................................................................................................................... 527
14.4.1 Single Mode (SCAN = 0) .................................................................................... 527
14.4.2 Scan Mode (SCAN = 1)....................................................................................... 529
14.4.3 Input Sampling and A/D Conversion Time ......................................................... 531
14.4.4 External Trigger Input Timing............................................................................. 532
14.5 Interrupts ........................................................................................................................... 533
14.6 Usage Notes ...................................................................................................................... 534
15.1 Overview........................................................................................................................... 539
15.1.1 Features................................................................................................................ 539
15.1.2 Block Diagram..................................................................................................... 540
15.1.3 Pin Configuration................................................................................................. 541
15.1.4 Register Configuration......................................................................................... 541
15.2 Register Descriptions ........................................................................................................ 542
Rev. 5.00, 12/03, page xxii of xxx
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