Block Diagram - Renesas H8S/2319 series Hardware Manual

11.1.2

Block Diagram

Figure 11-1 shows a block diagram of the WDT.
WOVI
(interrupt request
signal)
*1
WDTOVF
*2
Internal reset signal
Legend:
: Timer control/status register
TCSR
: Timer counter
TCNT
: Reset control/status register
RSTCSR
1. The WDTOVF output function is not available in the F-ZTAT versions.
Notes:
2. Internal reset signal generation is specified by means of a register setting.
Rev. 5.00, 12/03, page 408 of 1088
Overflow
Interrupt
control
Reset
control
RSTCSR TCNT
Module bus
Figure 11-1 Block Diagram of WDT
Clock
Clock
select
TSCR
WDT
φ/2
φ/64
φ/128
φ/512
φ/2048
φ/8192
φ/32768
φ/131072
Internal clock
sources
Bus
interface