Clock - Renesas H8S/2319 series Hardware Manual

13.3.5

Clock

Only an internal clock generated by the built-in baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1,
CKS0, BCP1, and BCP0 bits in SMR. The formula for calculating the bit rate is as shown below.
Table 13-5 shows some sample bit rates.
If clock output is selected by setting CKE0 to 1, the clock is output from the SCK pin. The clock
frequency is determined by the bit rate and the setting of bits BCP1 and BCP0.
φ
B =
S × 2 × (N + 1)
2n+1
Where N = Value set in BRR (0 ≤ N ≤ 255)
B = Bit rate (bits/s)
φ = Operating frequency (MHz)
n = See table 13-4
S = Number of internal clock cycles in 1-bit period set by bits BCP1 and BCP0
Table 13-4 Correspondence between n and CKS1, CKS0
n CKS1
0 0
1
2 1
3
Table 13-5 Examples of Bit Rate B (bits/s) for Various BRR Settings
(When n = 0 and S = 372)
N 10.00
0 13441
1 6720
2 4480
Note: Bit rates are rounded to the nearest whole number.
Rev. 5.00, 12/03, page 502 of 1088
× 10
6
CKS0
0
1
0
1
10.714 13.00
14400 17473
7200 8737
4800 5824
φ φ φ φ (MHz)
14.285 16.00 18.00
19200 21505 24194
9600 10753 12097
6400 7168 8065
20.00 25.00
26882 33602
13441 16801
8961 11201