Renesas H8S/2319 series Hardware Manual page 515

TE bit
SCK output pin
TxD output pin
Port input/output
Port
Figure 12-24 Asynchronous Transmission Using Internal Clock
TE bit
SCK output pin
TxD output pin
Port input/output
Port
Note: * Initialized by software standby.
Figure 12-25 Synchronous Transmission Using Internal Clock
Start of transmission
High output Start
SCI TxD output
Start of transmission
Marking output
SCI TxD output
Transition
to software
End of
transmission standby
Stop Port input/output
Transition
to software
End of
transmission standby
Port input/output
Last TxD bit held Port input/output
Rev. 5.00, 12/03, page 485 of 1088
Exit from
software
standby
Port input/output
High output
SCI TxD
Port
output
Exit from
software
standby
High output*
SCI TxD
Port
output