On-Board Programming Modes - Renesas H8S/2319 series Hardware Manual

Renesas 16-bit single-chip microcomputer
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17.6

On-Board Programming Modes

When pins are set to on-board programming mode, program/erase/verify operations can be
performed on the on-chip flash memory. There are two on-board programming modes: boot mode
and user program mode. The pin settings for transition to each of these modes are shown in table
17-9. For a diagram of the transitions to the various flash memory modes, see figure 17-3.
Table 17-9 Setting On-Board Programming Modes
MCU Mode
Boot mode
User program mode *
Note: * Normally, user mode should be used. Set the FWE pin to 1 to make a transition to user
program mode before performing a program/erase/verify operation.
17.6.1
Boot Mode
When boot mode is used, the flash memory programming control program must be prepared in the
host beforehand. The channel 1 SCI to be used is set to asynchronous mode.
When a reset-start is executed after the H8S/2318 F-ZTAT, H8S/2317 F-ZTAT, H8S/2315
F-ZTAT, or H8S/2314 F-ZTAT chip's pins have been set to boot mode, the boot program built
into the chip is started and the programming control program prepared in the host is serially
transmitted to the chip via the SCI. In the chip, the programming control program received via the
SCI is written into the programming control program area in on-chip RAM. After the transfer is
completed, control branches to the start address of the programming control program area and the
programming control program execution state is entered (flash memory programming is
performed).
The transferred programming control program must therefore include coding that follows the
programming algorithm given later.
The system configuration in boot mode is shown in figure 17-9, and the boot program mode
execution procedure in figure 17-10.
Modes
CPU Operating Mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Pins
FWE
MD2
MD1
1
0
1
1
1
1
Rev. 5.00, 12/03, page 575 of 1088
MD0
0
1
0
1

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