Renesas H8S/2319 series Hardware Manual page 364

Examples of 8-bit register access operation are shown in figures 9-3 to 9-5.
Internal data bus
H
Bus
L
master
Figure 9-3 8-Bit Register Access Operation [Bus Master ↔
Internal data bus
H
Bus
L
master
Figure 9-4 8-Bit Register Access Operation [Bus Master ↔
Internal data bus
H
Bus
L
master
Figure 9-5 8-Bit Register Access Operation [Bus Master ↔
Rev. 5.00, 12/03, page 334 of 1088
Bus interface
Bus interface
Bus interface
TCR
↔ TCR (Upper 8 Bits)] ↔ ↔
TMDR
↔ TMDR (Lower 8 Bits)] ↔ ↔
TCR TMDR
↔ TCR and TMDR (16 Bits)]
↔ ↔
Module
data bus
Module
data bus
Module
data bus