Renesas H8S/2319 series Hardware Manual page 672

Increment
address
Notes: 1. Prewriting (setting erase block data to all 0) is not necessary.
2. The values of x, y, z, α, β, γ, ε, η, θ, and N are shown in section 20.3.6, Flash Memory Characteristics.
3. Verify data is read in 16-bit (W) units.
4. Set only one bit in EBR1or EBR2. More than one bit cannot be set.
5. Erasing is performed in block units. To erase a number of blocks, the individual blocks must be erased sequentially.
Rev. 5.00, 12/03, page 642 of 1088
*1
Start
Set SWE1 (2) bit in FLMCR1 (2)
Wait (x) µs
n = 1
Set EBR1, EBR2
Enable WDT
Set ESU1 (2) bit in FLMCR1 (2)
Wait (y) µs
Set E1 (2) bit in FLMCR1 (2)
Wait (z) ms
Clear E1 (2) bit in FLMCR1(2)
Wait (α) µs
Clear ESU1 (2) bit in FLMCR1 (2)
Wait (β) µs
Disable WDT
Set EV1 (2) bit in FLMCR1 (2)
Wait (γ) µs
Set block start address to verify address
H'FF dummy write to verify address
Wait (ε) µs
Read verify data
Verify data = all 1?
OK
NG
Last address of block?
OK
Clear EV1 (2) bit in FLMCR1 (2)
Wait (η) µs
*5
End of
NG
erasing of all erase
blocks?
OK
Clear SWE1 (2) bit in FLMCR1 (2)
Wait (θ) µs
End of erasing
Figure 17-46 Erase/Erase-Verify Flowchart
*2
*4
*2
Start of erase
*2
Halt erase
*2
*2
*2
*2
*3
NG
Clear EV1 (2) bit in FLMCR1 (2)
Wait (η) µs
*2
n ≥ N?
Clear SWE1 (2) bit in FLMCR1 (2)
Wait (θ) µs
Erase failure
n ← n + 1
*2
*2
NG
OK