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Bit 5—D/A Enable (DAE): Used together with the DAOE0 and DAOE1 bits to control D/A
conversion. When the DAE bit is cleared to 0, channel 0 and 1 D/A conversions are controlled
independently. When the DAE bit is set to 1, channel 0 and 1 D/A conversions are controlled
together.
Output of conversion results is always controlled independently by the DAOE0 and DAOE1 bits.
Bit 7
Bit 6
DAOE1
DAOE0
0
0
1
1
0
1
If the chip enters software standby mode when D/A conversion is enabled, the D/A output is held
and the analog power current is the same as during D/A conversion. When it is necessary to reduce
the analog power current in software standby mode, clear both the DAOE0 and DAOE1 bits to 0
to disable D/A output.
Bits 4 to 0—Reserved: These bits cannot be modified and are always read as 1.
Bit 5
DAE
Description
×
Channel 0 and 1 D/A conversions disabled
0
Channel 0 D/A conversion enabled
Channel 1 D/A conversion disabled
1
Channel 0 and 1 D/A conversions enabled
0
Channel 0 D/A conversion disabled
Channel 1 D/A conversion enabled
1
Channel 0 and 1 D/A conversions enabled
×
Channel 0 and 1 D/A conversions enabled
Rev. 5.00, 12/03, page 543 of 1088
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