Renesas H8S/2319 series Hardware Manual page 732

Start programming
procedure program
Select on-chip program
to be downloaded and
set download destination
by FTDAR
Set FKEY to H'A5
Set SCO to 1 and
execute download
Clear FKEY to 0
DFPR=0?
Yes
Set the FPEFEQ and
FUBRA parameters
Initialization
JSR FTDAR setting+32
FPFR=0?
Yes
1
The procedure program must be executed in an area other than the flash memory to be
programmed. Especially the part where the SCO bit in FCCS is set to 1 for downloading must be
executed in the on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 17.29.3, Procedure Program and Storable Area for
Programming Data.
The following description assumes the area to be programmed on the user MAT is erased and
program data is prepared in the consecutive area. When erasing is not executed, erasing is
executed before writing.
128-byte programming is performed in one program processing. When more than 128-byte
programming is performed, programming destination address/program data parameter is updated
in 128-byte units and programming is repeated.
When less than 128-byte programming is performed, data must total 128 bytes by adding the
invalid data. If the invalid data to be added is H'FF, the program processing period can be shorted.
Rev. 5.00, 12/03, page 702 of 1088
(a)
(b)
(c)
(d)
(e)
No
Download error processing
(f)
(g)
(h)
No
Initialization error processing
Figure 17-70 Programming Procedure
1
Disable interrupts and bus
master operation other
than CPU
Set FKEY to H'5A
Set parameter to ER0 and
ER1 (FMPAR and FMPDR)
Programming
JSR FTDAR setting+16
FPFR=0?
Yes
Required data
No
programming is
completed?
Yes
Clear FKEY to 0
End programming
procedure program
(i)
(j)
(k)
(l)
(m)
No
Clear FKEY and
programming
error processing
(n)
(o)