Basic Instruction Formats - Renesas H8S/2319 series Hardware Manual

2.6.4

Basic Instruction Formats

The CPU instructions consist of 2-byte (1-word) units. An instruction consists of an operation
field (op field), a register field (r field), an effective address extension (EA field), and a condition
field (cc).
Figure 2-9 shows examples of instruction formats.
(1) Operation field only
(2) Operation field and register fields
op
(3) Operation field, register fields, and effective address extension
(4) Operation field, effective address extension, and condition field
op
(1) Operation Field: Indicates the function of the instruction, the addressing mode, and the
operation to be carried out on the operand. The operation field always includes the first four bits of
the instruction. Some instructions have two operation fields.
(2) Register Field: Specifies a general register. Address registers are specified by 3 bits, data
registers by 3 bits or 4 bits. Some instructions have two register fields. Some have no register
field.
(3) Effective Address Extension: Eight, 16, or 32 bits specifying immediate data, an absolute
address, or a displacement.
(4) Condition Field: Specifies the branching condition of Bcc instructions.
op
rn
op
EA (disp)
cc
Figure 2-9 Instruction Formats (Examples)
rm
rn rm
EA (disp)
Rev. 5.00, 12/03, page 51 of 1088
NOP, RTS, etc.
ADD.B Rn, Rm, etc.
MOV.B @(d:16, Rn), Rm, etc.
BRA d:16, etc