Register Configuration; Register Descriptions; Mode Control Register (Mdcr) - Renesas H8S/2319 series Hardware Manual

Do not change the inputs at the mode pins during operation.
3.1.3

Register Configuration

The H8S/2319 and H8S/2318 Groups have a mode control register (MDCR) that indicates the
inputs at the mode pins (MD2 to MD0), and a system control register (SYSCR) and system control
register 2 (SYSCR2) *
Table 3-3 Registers
Name
Mode control register
System control register
System control register 2 *
Notes: 1. Lower 16 bits of the address.
2. The SYSCR2 register can only be used in the F-ZTAT versions. In the mask ROM and
ROMless versions this register will return an undefined value if read, and cannot be
modified.
3.2

Register Descriptions

3.2.1

Mode Control Register (MDCR)

Bit : 7
—
Initial value : 1
R/W : —
Note: * Determined by pins MD2 to MD0.
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2319
and H8S/2318 Group chips.
Bit 7—Reserved: This bit is always read as 1, and cannot be modified.
Bits 6 to 3—Reserved: These bits are always read as 0, and cannot be modified.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins
MD2 to MD0 (the current operating mode). Bits MDS2 to MDS0 correspond to pins MD2 to
MD0. MDS2 to MDS0 are read-only bits, and cannot be written to. The mode pin (MD2 to MD0)
input levels are latched into these bits when MDCR is read. These latches are canceled by a reset.
Rev. 5.00, 12/03, page 72 of 1088
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that control the operation of the chip. Table 3-3 summarizes these registers.
Abbreviation
MDCR
SYSCR
2
SYSCR2
6 5
— —
0 0
— —
R/W Initial Value
R Undefined
R/W H'01
R/W H'00
4 3
— — MDS2
0 0
— —
Address *
H'FF3B
H'FF39
H'FF42
2 1
MDS1 MDS0
— * — * — *
R R
1
0
R