Renesas H8S/2319 series Hardware Manual page 263

Renesas 16-bit single-chip microcomputer
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Port 2 Data Direction Register (P2DDR)
Bit
:
7
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
Initial value :
0
R/W
:
W
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read.
Setting P2DDR bits to 1 makes the corresponding port 2 pins output pins, while clearing the bits
to 0 makes the pins input pins.
P2DDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state
after in software standby mode.
Port 2 Data Register (P2DR)
Bit
:
7
P27DR
Initial value :
0
R/W
:
R/W
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P27 to P20).
P2DR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state after
in software standby mode.
Port 2 Register (PORT2)
Bit
:
7
P27
— *
Initial value :
R/W
:
R
Note: * Determined by state of pins P27 to P20.
PORT2 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 2 pins (P27 to P20) must always be performed on P2DR.
If a port 2 read is performed while P2DDR bits are set to 1, the P2DR values are read. If a port 2
read is performed while P2DDR bits are cleared to 0, the pin states are read.
6
5
0
0
W
W
6
5
P26DR
P25DR
0
0
R/W
R/W
6
5
P26
P25
— *
— *
R
R
4
3
0
0
W
W
4
3
P24DR
P23DR
0
0
R/W
R/W
4
3
P24
P23
— *
— *
R
R
Rev. 5.00, 12/03, page 233 of 1088
2
1
0
0
W
W
2
1
P22DR
P21DR
0
0
R/W
R/W
2
1
P22
P21
— *
— *
R
R
0
0
W
0
P20DR
0
R/W
0
P20
— *
R

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