Serial Mode Register (Smr) - Renesas H8S/2319 series Hardware Manual

Bits 3 to 0—Operate in the same way as for the normal SCI. For details, see section 12.2.7, Serial
Status Register (SSR).
However, the setting conditions for the TEND bit, are as shown below.
Bit 2
TEND Description
0 Indicates transfer in progress
[Clearing conditions]
•
When 0 is written to TDRE after reading TDRE = 1
•
When the DTC is activated by a TXI interrupt and writes data to TDR
1 Indicates transfer complete
[Setting conditions]
•
Upon reset, and in standby mode or module stop mode
•
When the TE bit in SCR is 0 and the ERS bit is also 0
•
When TDRE = 1 and ERS = 0 (normal transmission) 2.5 etu after transmission of a
1-byte serial character when GM = 0 and BLK = 0
•
When TDRE = 1 and ERS = 0 (normal transmission) 1.5 etu after transmission of a
1-byte serial character when GM = 0 and BLK = 1
•
When TDRE = 1 and ERS = 0 (normal transmission) 1.0 etu after transmission of a
1-byte serial character when GM = 1 and BLK = 0
•
When TDRE = 1 and ERS = 0 (normal transmission) 1.0 etu after transmission of a
1-byte serial character when GM = 1 and BLK = 1
Note: etu: Elementary time unit (time for transfer of 1 bit)
13.2.3

Serial Mode Register (SMR)

Bit : 7
GM
Initial value : 0
R/W : R/W
Note: * When the smart card interface is used, set a value of 1 in bit 5.
The function of bits 7, 6, 3, and 2 of SMR changes in smart card interface mode.
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
This bit is cleared to 0 when the normal smart card interface is used. In GSM mode, this bit is set
to 1, the timing of setting of the TEND flag that indicates transmission completion is advanced,
6 5
PE *
BLK
0 0
R/W R/W R/W
4 3
O/E BCP1 BCP0
0 0
R/W R/W
Rev. 5.00, 12/03, page 493 of 1088
(Initial value)
2 1 0
CKS1 CKS0
0 0 0
R/W R/W