Renesas H8S/2319 series Hardware Manual page 617

Renesas 16-bit single-chip microcomputer
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Set block start address to verify address
Increment
address
NG
NG
Notes: 1. Prewriting (setting erase block data to all 0) is not necessary.
2. The values of x, y, z, α, β, γ, ε, η, θ, and N are shown in section 20.3.6, Flash Memory Characteristics.
3. Verify data is read in 16-bit (W) units.
4. Set only one bit in EBR1or EBR2. More than one bit cannot be set.
5. Erasing is performed in block units. To erase a number of blocks, the individual blocks must be erased sequentially.
Figure 17-16 Erase/Erase-Verify Flowchart
*1
Start
Set SWE bit in FLMCR1
Wait (x) µs
n = 1
Set EBR1, EBR2
Enable WDT
Set ESU bit in FLMCR1
Wait (y) µs
Set E bit in FLMCR1
Wait (z) ms
Clear E bit in FLMCR1
Wait (α) µs
Clear ESU bit in FLMCR1
Wait (β) µs
Disable WDT
Set EV bit in FLMCR1
Wait (γ) µs
H'FF dummy write to verify address
Wait (ε) µs
Read verify data
Verify data = all 1?
OK
Last address of block?
OK
Clear EV bit in FLMCR1
Wait (η) µs
*5
End of
erasing of all erase
blocks?
OK
Clear SWE bit in FLMCR1
Wait (θ) µs
End of erasing
*2
*4
*2
Start of erase
*2
Halt erase
*2
*2
*2
*2
*3
NG
Clear EV bit in FLMCR1
Wait (η) µs
*2
n ≥ N?
Clear SWE bit in FLMCR1
Wait (θ) µs
Erase failure
Rev. 5.00, 12/03, page 587 of 1088
n ← n + 1
*2
*2
NG
OK

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