Renesas H8S/2319 series Hardware Manual page 194

Address bus
Read
Write
Note: n = 0 to 7
Figure 6-10 Bus Timing for 16-Bit 2-State Access Space (3) (Word Access)
Rev. 5.00, 12/03, page 164 of 1088
φ
CSn
AS
RD
D to D
15 8
D to D
7 0
HWR
LWR
D to D
15 8
D to D
7 0
Bus cycle
T
1
Valid
Valid
T
2
Valid
Valid