Table of Contents
Advertisement
register 1 (FLMCR1) is set. In the H8S/2319, indicates the total time during which the
P1 bit and P2 bit in the flash memory control registers (FLMCR1, FLMCR2) are set.
Does not include the program-verify time.)
3. Time to erase one block. (In the H8S/2318, H8S/2317, H8S/2315, and H8S/2314,
indicates the total time during which during which the E1 bit in FLMCR1 and the E2 bit
in FLMCR2 are set. Does not include the erase-verify time.)
4. Maximum programming time
t
(max) =
P
5. The maximum number of writes (N) should be set as shown below according to the
actual set value of z so as not to exceed the maximum programming time (t
The wait time after P bit setting (z) should be changed as follows according to the
number of writes (n).
Number of writes (n)
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
[In additional programming]
Number of writes (n)
1 ≤ n ≤ 6
6. For the maximum erase time (t
wait time after E bit setting (z) and the maximum number of erases (N):
(max) = Wait time after E bit setting (z) × maximum number of erases (N)
t
E
Rev. 5.00, 12/03, page 834 of 1088
N
wait time after P bit setting (z)
i=1
z = 30 µs
z = 200 µs
z = 10 µs
(max)), the following relationship applies between the
E
(max)).
P
Advertisement
Table of Contents
