Renesas H8S/2319 series Hardware Manual page 286

Port B Data Register (PBDR)
Bit : 7
PB7DR
Initial value : 0
R/W : R/W
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB7 to
PB0). PBDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior
state in software standby mode.
Port B Register (PORTB)
Bit : 7
PB7
— *
Initial value :
R/W : R
Note: * Determined by state of pins PB7 to PB0.
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB7 to PB0) must always be performed on PBDR.
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTB contents are determined by the pin states, as
PBDDR and PBDR are initialized. PORTB retains its prior state in software standby mode.
Rev. 5.00, 12/03, page 256 of 1088
6 5
PB6DR PB5DR PB4DR
0 0
R/W R/W
6 5
PB6 PB5
— * — *
R R
4 3
PB3DR PB2DR
0 0
R/W R/W R/W
4 3
PB4 PB3 PB2
— * — *
R R
2 1
PB1DR PB0DR
0 0
R/W R/W
2 1
PB1 PB0
— * — * — *
R R
0
0
0
R