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8.2.2
Register Configuration
Table 8-2 shows the port 1 register configuration.
Table 8-2
Port 1 Registers
Name
Port 1 data direction register
Port 1 data register
Port 1 register
Port function control register 1
Note: * Lower 16 bits of the address.
Port 1 Data Direction Register (P1DDR)
Bit
:
7
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
Initial value :
0
R/W
:
W
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1. P1DDR cannot be read; if it is, an undefined value will be read.
Setting a P1DDR bit to 1 makes the corresponding port 1 pins output pins, while clearing the bit to
0 makes the pins input pins.
P1DDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state
after in software standby mode.
Whether the address output pins maintain their output state or go to the high-impedance state in a
transition to software standby mode is selected by the OPE bit in SBYCR.
Port 1 Data Register (P1DR)
Bit
:
7
P17DR
Initial value :
0
R/W
:
R/W
P1DR is an 8-bit readable/writable register that stores output data for the port 1 pins (P17 to P10).
Abbreviation
P1DDR
P1DR
PORT1
PFCR1
6
5
0
0
W
W
6
5
P16DR
P15DR
0
0
R/W
R/W
R/W
Initial Value
W
H'00
R/W
H'00
R
Undefined
R/W
H'0F
4
3
0
0
W
W
4
3
P14DR
P13DR
0
0
R/W
R/W
Rev. 5.00, 12/03, page 221 of 1088
Address *
H'FEB0
H'FF60
H'FF50
H'FF45
2
1
0
0
W
W
2
1
P12DR
P11DR
0
0
R/W
R/W
0
0
W
0
P10DR
0
R/W
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