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Type
Symbol
Interrupts
NMI
IRQ7 to
IRQ0
Address bus
A23 to
A0
Data bus
D15 to
D0
CS7 to
Bus control
CS0
AS
RD
HWR
LWR
WAIT
Rev. 5.00, 12/03, page 20 of 1088
Pin No.
TFP-100B,
TFP-100G FP-100A I/O
63
65
94, 93,
96, 95,
13, 12,
15, 14,
73 to 76
75 to 78
2, 1,
4 to 1,
100, 99,
55 to 52,
53 to 50,
50 to 43,
48 to 41,
41 to 34
39 to 32
30 to 19,
32 to 21,
17 to 14
19 to 16
94 to 97
96 to 99
75, 76
77, 78
70
72
71
73
72
74
73
75
74
76
Name and Function
Input
Nonmaskable interrupt: Requests a
nonmaskable interrupt. When this pin
is not used, it should be fixed high.
Input
Interrupt request 7 to 0: These pins
request a maskable interrupt.
Output Address bus: These pins output an
address.
I/O
Data bus: These pins constitute a
bidirectional data bus.
Output Chip select: Signals for selecting
areas 7 to 0.
Output Address strobe: When this pin is low,
it indicates that address output on
the address bus is enabled.
Output Read: When this pin is low, it
indicates that the external address
space can be read.
Output High write: A strobe signal that writes
to external space and indicates that
the upper half (D15 to D8) of the data
bus is enabled.
Output Low write: A strobe signal that writes
to external space and indicates that
the lower half (D7 to D0) of the data
bus is enabled.
Input
Wait: Requests insertion of a wait
state in the bus cycle when
accessing external 3-state access
space.
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