Renesas H8S/2319 series Hardware Manual page 26

17.23.2 Programming/Erasing Interface Parameter .......................................................... 681
17.23.3 System Control Register 2 (SYSCR2) ................................................................. 693
17.23.4 RAM Emulation Register (RAMER)................................................................... 694
17.24 On-Board Programming Mode ......................................................................................... 696
17.24.1 Boot Mode ........................................................................................................... 696
17.24.2 User Program Mode............................................................................................. 699
17.24.3 User Boot Mode................................................................................................... 710
17.25 Protection .......................................................................................................................... 713
17.25.1 Hardware Protection ............................................................................................ 713
17.25.2 Software Protection.............................................................................................. 714
17.25.3 Error Protection.................................................................................................... 715
17.26 Flash Memory Emulation in RAM ................................................................................... 717
17.27 Switching between User MAT and User Boot MAT ........................................................ 720
17.27.1 Usage Notes ......................................................................................................... 721
17.28 PROM Mode..................................................................................................................... 723
17.28.1 Pin Arrangement of the Socket Adapter .............................................................. 723
17.28.2 PROM Mode Operation....................................................................................... 726
17.28.3 Memory-Read Mode............................................................................................ 727
17.28.4 Auto-Program Mode ............................................................................................ 727
17.28.5 Auto-Erase Mode................................................................................................. 728
17.28.6 Status-Read Mode................................................................................................ 728
17.28.7 Status Polling ....................................................................................................... 729
17.28.8 Time Taken in Transition to PROM Mode .......................................................... 729
17.28.9 Notes on Using PROM Mode .............................................................................. 729
17.29 Further Information........................................................................................................... 731
17.29.1 Serial Communication Interface Specification for Boot Mode............................ 731
17.29.2 AC Characteristics and Timing in PROM Mode ................................................. 757
17.29.3 Procedure Program and Storable Area for Programming Data ............................ 763
Section 18 Clock Pulse Generator
18.1 Overview........................................................................................................................... 769
18.1.1 Block Diagram..................................................................................................... 769
18.1.2 Register Configuration......................................................................................... 770
18.2 Register Descriptions ........................................................................................................ 770
18.2.1 System Clock Control Register (SCKCR) ........................................................... 770
18.3 Oscillator........................................................................................................................... 772
18.3.1 Connecting a Crystal Resonator........................................................................... 772
18.3.2 External Clock Input ............................................................................................ 774
18.4 Duty Adjustment Circuit................................................................................................... 776
18.5 Medium-Speed Clock Divider .......................................................................................... 776
18.6 Bus Master Clock Selection Circuit .................................................................................. 776
Rev. 5.00, 12/03, page xxvi of xxx
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