Renesas H8S/2319 series Hardware Manual page 977

TIOR3H—Timer I/O Control Register 3H
Bit : 7
Initial value : IOB3
0
Read/Write : R/W
TGR3B I/O Control
0 0 0
1
1 0
1
1 0 0
1
×
1
When bits TPSC2 to TPSC0 in TCR4 are set to B'000, and φ/1 is used as
Note: *
the TCNT4 count clock, this setting is invalid and input capture does not
occur.
6 5 4
IOB2 IOB1 IOB0
0 0 0
R/W R/W R/W
TGR3A I/O Control
0
1
0
TGR3B Output disabled
is output
1 Initial output is
compare
0 output
register
0
1
0
Output disabled
1
Initial output is 1
output
0
1
0 TGR3B Capture input
is input source is
1
capture TIOCB3 pin
register
×
×
Capture input
source is channel
4/count clock
3 2 1
IOA3 IOA2 IOA1
0 0 0
R/W R/W R/W
0 0 0
TGR3A Output disabled
is output
1
Initial output is
compare
0 output
register
1 0
1
1 0 0
Output disabled
1
Initial output is
1 output
1 0
1
TGR3A Capture input
0 0 0
is input source is
1
capture TIOCA3 pin
register
×
1
× ×
1 Capture input
source is channel
4/count clock
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT4 count-up/
*
count-down
×
: Don't care
Rev. 5.00, 12/03, page 947 of 1088
H'FE82
0
IOA0
0
R/W
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT4 count-up/
count-down
TPU3
× : Don't care