Renesas H8S/2319 series Hardware Manual page 19

Renesas 16-bit single-chip microcomputer
Table of Contents

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8.12.2 Register Configuration......................................................................................... 288
8.12.3 Pin Functions ....................................................................................................... 292
9.1
Overview........................................................................................................................... 295
9.1.1
Features................................................................................................................ 295
9.1.2
Block Diagram..................................................................................................... 299
9.1.3
Pin Configuration................................................................................................. 300
9.1.4
Register Configuration......................................................................................... 302
9.2
Register Descriptions ........................................................................................................ 304
9.2.1
Timer Control Registers (TCR) ........................................................................... 304
9.2.2
Timer Mode Registers (TMDR) .......................................................................... 309
9.2.3
Timer I/O Control Registers (TIOR) ................................................................... 311
9.2.4
Timer Interrupt Enable Registers (TIER) ............................................................ 324
9.2.5
Timer Status Registers (TSR) .............................................................................. 326
9.2.6
Timer Counters (TCNT) ...................................................................................... 330
9.2.7
Timer General Registers (TGR)........................................................................... 330
9.2.8
Timer Start Register (TSTR) ............................................................................... 331
9.2.9
Timer Synchro Register (TSYR) ......................................................................... 331
9.2.10 Module Stop Control Register (MSTPCR) .......................................................... 332
9.3
Interface to Bus Master ..................................................................................................... 333
9.3.1
16-Bit Registers ................................................................................................... 333
9.3.2
8-Bit Registers ..................................................................................................... 333
9.4
Operation .......................................................................................................................... 335
9.4.1
Overview.............................................................................................................. 335
9.4.2
Basic Functions.................................................................................................... 336
9.4.3
Synchronous Operation........................................................................................ 342
9.4.4
Buffer Operation .................................................................................................. 344
9.4.5
Cascaded Operation ............................................................................................. 348
9.4.6
PWM Modes ........................................................................................................ 350
9.4.7
Phase Counting Mode .......................................................................................... 355
9.5
Interrupts ........................................................................................................................... 362
9.5.1
Interrupt Sources and Priorities............................................................................ 362
9.5.2
DTC Activation.................................................................................................... 364
9.5.3
A/D Converter Activation.................................................................................... 364
9.6
Operation Timing.............................................................................................................. 365
9.6.1
Input/Output Timing ............................................................................................ 365
9.6.2
Interrupt Signal Timing........................................................................................ 369
9.7
Usage Notes ...................................................................................................................... 373
.................................................................... 295
Rev. 5.00, 12/03, page xix of xxx

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