Renesas H8S/2319 series Hardware Manual page 472

Renesas 16-bit single-chip microcomputer
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Table 12-4 BRR Settings for Various Bit Rates (Synchronous Mode)
Bit Rate φ φ φ φ = 2 MHz
(bits/s) n
N
110
3
70
250
2
124
500
1
249
1 k
1
124
2.5 k
0
199
5 k
0
99
10 k
0
49
25 k
0
19
50 k
0
9
100 k
0
4
250 k
0
1
0 *
500 k
0
1 M
2.5 M
5 M
Notes: As far as possible, the setting should be made so that the error is no more than 1%.
Blank : Cannot be set.
— : Can be set, but there will be a degree of error.
* : Continuous transfer is not possible.
Rev. 5.00, 12/03, page 442 of 1088
φ φ φ φ = 4 MHz
φ φ φ φ = 8 MHz
n
N
n
N
2
249
3
124
2
124
2
249
1
249
2
124
1
99
1
199
0
199
1
99
0
99
0
199
0
39
0
79
0
19
0
39
0
9
0
19
0
3
0
7
0
1
0
3
0 *
0
0
1
φ φ φ φ = 10 MHz
φ φ φ φ = 16 MHz
n
N
n
N
3
249
3
124
2
249
1
249
2
99
1
124
1
199
0
249
1
99
0
99
0
159
0
49
0
79
0
24
0
39
0
9
0
15
0
4
0
7
0
3
0 *
0
φ φ φ φ = 20 MHz
φ φ φ φ = 25 MHz
n
N
n
N
3
97
2
124
2
155
1
249
2
77
1
124
1
155
0
199
0
249
0
99
0
124
0
49
0
62
0
19
0
24
0
9
0
4
0
1
0 *
0

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