Renesas H8S/2319 series Hardware Manual page 397

Renesas 16-bit single-chip microcomputer
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Timing for Counter Clearing by Compare Match/Input Capture: Figure 9-38 shows the
timing when counter clearing by compare match occurrence is specified, and figure 9-39 shows
the timing when counter clearing by input capture occurrence is specified.
φ
Compare
match signal
Counter
clear signal
TCNT
TGR
Figure 9-38 Counter Clear Timing (Compare Match)
φ
Input capture
signal
Counter clear
signal
TCNT
TGR
N
N
N
Figure 9-39 Counter Clear Timing (Input Capture)
H'0000
H'0000
N
Rev. 5.00, 12/03, page 367 of 1088

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