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TIOR4—Timer I/O Control Register 4
Bit
:
7
IOB3
Initial value
:
0
Read/Write
:
R/W
TGR4B I/O Control
0
0
0
1
1
0
1
1
0
0
1
×
1
Rev. 5.00, 12/03, page 954 of 1088
6
5
4
IOB2
IOB1
IOB0
0
0
0
R/W
R/W
R/W
TGR4A I/O Control
0
1
0
Output disabled
TGR4B
is output
Initial output is 0
1
compare
output
register
0
1
0
Output disabled
1
Initial output is 1
output
0
1
0
TGR4B
Capture input
is input
source is
1
capture
TIOCB4 pin
register
×
×
Capture input
source is TGR3C
compare match/
input capture
3
2
1
IOA3
IOA2
IOA1
0
0
0
R/W
R/W
R/W
0
0
0
TGR4A
Output disabled
is output
1
Initial output is 0
compare
output
register
1
0
1
1
0
0
Output disabled
1
Initial output is 1
output
1
0
1
0
0
0
TGR4A
Capture input
is input
source is
1
capture
TIOCA4 pin
register
×
1
×
×
1
Capture input
source is TGR3A
compare match/
input capture
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
TGR3C compare match/input
capture
× : Don't care
H'FE92
0
IOA0
0
R/W
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at generation of
TGR3A compare match/input
capture
TPU4
× : Don't care
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