Section 16 Ram; Overview; Block Diagram - Renesas H8S/2319 series Hardware Manual

16.1

Overview

The chip has on-chip high-speed static RAM. The RAM is connected to the CPU by a 16-bit data
bus, enabling one-state access by the CPU to both byte data and word data. This makes it possible
to perform fast word data transfer.
The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the
system control register (SYSCR).
Note: The amount of on-chip RAM is 16 kbytes in the H8S/2319C, 8 kbytes in the H8S/2319,
H8S/2318, H8S/2317, H8S/2316, H8S/2315, and H8S/2312S, 4 kbytes in the H8S/2314,
and 2 kbytes in the H8S/2313, H8S/2311, and H8S/2310.
16.1.1

Block Diagram

Figure 16-1 shows a block diagram of 8 kbytes of on-chip RAM.

Section 16 RAM

Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'FFDC00
H'FFDC02
H'FFDC04
H'FFFBFE
Figure 16-1 Block Diagram of RAM (8 kbytes)
H'FFDC01
H'FFDC03
H'FFDC05
H'FFFBFF
Rev. 5.00, 12/03, page 547 of 1088