Renesas H8S/2319 series Hardware Manual page 738

A single divided block is erased by one erasing processing. For block divisions, refer to figure 17-
63, Block Division of User MAT. To erase two or more blocks, update the erase block number
and perform the erasing processing for each block.
(a) Select the on-chip program to be downloaded
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are
set, download is not performed and a download error is returned to the source select error
detect (SS) bit in the DPFR parameter.
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the
same as those in the programming procedure. For details, refer to Programming Procedure in
User Program Mode in section 17.24.2.
(b) Set the FEBS parameter necessary for erasure
Set the erase block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the
return value parameter FPFR.
(c) Erasure
Similar to as in programming, there is an entry point of the erasing program in the area from
(download start address set by FTDAR) + 16 bytes of on-chip RAM. The subroutine is called
and erasing is executed by using the following steps.
MOV.L #DLTOP+16,ER2
JSR @ER2
NOP
— The general registers other than R0L are saved in the erasing program.
— R0 is a return value of the FPFR parameter.
— Since the stack area is used in the erasing program, a stack area of a maximum 128 bytes
must be reserved in RAM
(d) The return value in the erasing program, FPFR (general register R0L) is judged.
(e) Determine whether erasure of the necessary blocks has finished.
If more than one block is to be erased, update the FEBS parameter and repeat steps (b) to (e).
Blocks that have already been erased can be erased again.
(f) After erasure finishes, clear FKEY and specify software protection.
If this LSI is restarted by a power-on reset immediately after user MAT erasure has finished,
secure a reset period (period of RES = 0) that is at least as long as normal 100 µs.
Rev. 5.00, 12/03, page 708 of 1088
; Set entry address to ER2
; Call erasing routine