Exception Vector Table - Renesas H8S/2319 series Hardware Manual

For a reset exception, steps 2 and 3 above are carried out.
4.1.3

Exception Vector Table

The exception sources are classified as shown in figure 4-1. Different vector addresses are
assigned to different exception sources.
Table 4-2 lists the exception sources and their vector addresses.
Exception
sources
In modes 6 and 7, the on-chip ROM available for use after a power-on reset is the 64-kbyte area
comprising addresses H'000000 to H'00FFFF. Care is required when setting vector addresses. In
this case, clearing the EAE bit in BCRL enables the 256-kbyte (128 kbytes/384 kbytes/512 kbytes)
area * comprising addresses H'000000 to H'03FFFF (to H'01FFFF/H'05FFFF/H'07FFFF) to be
used.
Note: * The different have different amounts of on-chip ROM. For details, see section 6.2.5, Bus
Control Register L (BCRL).
Rev. 5.00, 12/03, page 100 of 1088
· Reset
· Trace
External interrupts: NMI, IRQ7 to IRQ0
· Interrupts
Internal interrupts: interrupts from on-chip
supporting modules
· Trap instruction
Figure 4-1 Exception Sources