System Control Register 2 (Syscr2) - Renesas H8S/2319 series Hardware Manual

Bit 4—Flash Key Register Error Detect (FK): Returns the check result of FKEY value before
start of the erasing processing.
Bit 4
FK Description
0 FKEY setting is normal (FKEY = H'5A)
1 FKEY setting is error (FKEY = value other than H'5A)
Bit 3—Erase Block Select Error Detect (EB): Returns the check result whether the specified
erase-block number is in the block range of the user MAT.
Bit 3
EB Description
0 Setting of erase-block number is normal
1 Setting of erase-block number is abnormal
Bits 2 and 1—Reserved: Return 0.
Bit 0—Success/Fail (SF): Indicates whether the erasing processing is ended normally or not.
Bit 0
SF Description
0 Erasure is ended normally (no error)
1 Erasure is ended abnormally (error occurs)

17.23.3 System Control Register 2 (SYSCR2)

Bit : 7
—
Initial value : 0
R/W : —
SYSCR2 is an 8-bit readable/writable register that performs on-chip flash memory control.
SYSCR2 is initialized to H'00 by a reset and in hardware standby mode.
SYSCR2 can only be used in the F-ZTAT versions. In the mask ROM versions this register will
return an undefined value if read, and cannot be modified.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 0.
6 5
— — —
0 0
— — —
4 3 2
FLSHE —
0 0 0
R/W —
Rev. 5.00, 12/03, page 693 of 1088
1 0
— —
0 0
— R/W