Renesas H8S/2319 series Hardware Manual page 805

Table 18-4 External Clock Input Conditions
Item
External clock input
low pulse width
External clock input
high pulse width
External clock rise time t
External clock fall time
Clock low pulse width
level
Clock high pulse width
level
EXTAL
V = 2.7 V
CC
to 3.3 V
Symbol Min Max
t 20 —
EXL
t 20 —
EXH
— 5
EXr
t — 5
EXf
t 0.4 0.6
CL
80 —
t 0.4 0.6
CH
80 —
t
EXH
t
EXr
Figure 18-6 External Clock Input Timing
V = 3.0 V
CC
to 3.6 V
Min Max Unit
10 — ns
10 — ns
— 5 ns
— 5 ns
φ ≥ 5 MHz
0.4 0.6 t
cyc
φ < 5 MHz
80 — ns
φ ≥ 5 MHz
0.4 0.6 t
cyc
φ < 5 MHz
80 — ns
t
EXL
t
EXf
Rev. 5.00, 12/03, page 775 of 1088
Test
Conditions
Figure 18-6
Figure 20-2
× 0.5
V
CC