Renesas H8S/2319 series Hardware Manual page 398

Renesas 16-bit single-chip microcomputer
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Buffer Operation Timing: Figures 9-40 and 9-41 show the timing in buffer operation.
φ
TCNT
Compare
match signal
TGRA,
TGRB
TGRC,
TGRD
Figure 9-40 Buffer Operation Timing (Compare Match)
φ
Input capture
signal
TCNT
TGRA,
TGRB
TGRC,
TGRD
Figure 9-41 Buffer Operation Timing (Input Capture)
Rev. 5.00, 12/03, page 368 of 1088
n
n
N
N
n
N
n
n+1
N
N+1
N+1
N

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