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Contention between TGR Read and Input Capture: If the input capture signal is generated in
the T
state of a TGR read cycle, the data that is read will be the data after input capture transfer.
1
Figure 9-53 shows the timing in this case.
φ
Address
Read signal
Input capture
signal
TGR
Internal
data bus
Figure 9-53 Contention between TGR Read and Input Capture
Rev. 5.00, 12/03, page 378 of 1088
TGR read cycle
T
T
1
2
TGR address
X
M
M
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