Pin Configuration - Renesas H8S/2319 series Hardware Manual

17.22.8 Pin Configuration

Flash memory is controlled by the pin as shown in table 17-47.
Table 17-47 Pin Configuration
Pin Name
Reset
Mode 2
Mode 1
Mode 0
Port 66
Port 65
Port 64
Transmit data
Receive data
Note: For the pin configuration in PROM mode, see section 17.28, PROM Mode.
17.22.9 Register Configuration
(1) Registers
The registers/parameters which control flash memory when the on-chip flash memory is valid are
shown in table 17-48.
To access any of the flash memory control registers except RAMER, the FLSHE bit in SYSCR2
must be set to 1 in a mode in which flash memory is enabled.
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 17-49.
Abbreviation Input/Output
RES
Input
MD2 Input
MD1 Input
MD0 Input
P66 Input
P65 Input
P64 Input
TxD1 Output
RxD1 Input
Function
Reset
Sets operating mode of this LSI
Sets operating mode of this LSI
Sets operating mode of this LSI
Sets operating mode of this LSI in
PROM Mode
Sets operating mode of this LSI in
PROM Mode
Sets operating mode of this LSI in
PROM Mode
Serial transmit data output
Serial receive data input
Rev. 5.00, 12/03, page 673 of 1088